RoHS compliant products.
• Power supply: VDD: 2.5V ± 0.2V VDDQ: 2.5V ± 0.2V
• Max clock Freq: 133MHZ.
• Double-data-rate architecture; two data transfers per clock cycle
• Differential clock inputs (CK and /CK)
• DLL aligns DQ and DQS transition with CK transition
• Auto and Self Refresh 7.8us refresh interval.
• Data I/O transactions on both edge of data strobe.
• Edge aligned data output, center aligned data
• Serial Presence Detect (SPD) with serial EEPROM
• SSTL-2 compatible inputs and outputs.
• MRS cycle with address key programs. CAS Latency (Access from column address): 2.5 Burst Length (2,4,8) Data Sequence (Sequential & Interleave)